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» Processor Modeling for Hardware Software Codesign
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94
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CODES
2006
IEEE
15 years 6 months ago
TLM/network design space exploration for networked embedded systems
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
Nicola Bombieri, Franco Fummi, Davide Quaglia
112
Voted
LCTRTS
2004
Springer
15 years 5 months ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
CODES
2005
IEEE
15 years 6 months ago
An architectural level design methodology for embedded face detection
Face detection and recognition research has attracted great attention in recent years. Automatic face detection has great potential in a large array of application areas, includin...
Vida Kianzad, Sankalita Saha, Jason Schlessman, Ga...
CSE
2011
IEEE
14 years 8 days ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
QEST
2010
IEEE
14 years 10 months ago
On the Theory of Stochastic Processors
Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recen...
Parasara Sridhar Duggirala, Sayan Mitra, Rakesh Ku...