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CODES
2008
IEEE
15 years 8 months ago
Extending open core protocol to support system-level cache coherence
Open Core Protocol (OCP) is a standard on-chip core interface specification. The current release is flexible and configurable to support the communication needs of a wide range...
Konstantinos Aisopos, Chien-Chun Chou, Li-Shiuan P...
CODES
2003
IEEE
15 years 7 months ago
Schedule-aware performance estimation of communication architecture for efficient design space exploration
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Sungchan Kim, Chaeseok Im, Soonhoi Ha
DATE
2009
IEEE
128views Hardware» more  DATE 2009»
15 years 8 months ago
A case study in distributed deployment of embedded software for camera networks
—We present an embedded software application for the real-time estimation of building occupancy using a network of video cameras. We analyze a series of alternative decomposition...
Francesco Leonardi, Alessandro Pinto, Luca P. Carl...
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
15 years 8 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
HIPEAC
2007
Springer
15 years 8 months ago
A Throughput-Driven Task Creation and Mapping for Network Processors
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
Lixia Liu, Xiao-Feng Li, Michael K. Chen, Roy Dz-C...