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» Processor Modeling for Hardware Software Codesign
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IJES
2006
110views more  IJES 2006»
15 years 11 days ago
Partitioning bin-packing algorithms for distributed real-time systems
Embedded real-time systems must satisfy not only logical functional requirements but also para-functional properties such as timeliness, Quality of Service (QoS) and reliability. W...
Dionisio de Niz, Raj Rajkumar
92
Voted
ANSS
2004
IEEE
15 years 4 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
118
Voted
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
15 years 5 months ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...
152
Voted
PLDI
2003
ACM
15 years 5 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
ACSAC
2003
IEEE
15 years 5 months ago
MLS-PCA: A High Assurance Security Architecture for Future Avionics
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
Clark Weissman