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ASPLOS
1992
ACM
15 years 1 months ago
Application-Controlled Physical Memory using External Page-Cache Management
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
Kieran Harty, David R. Cheriton
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 1 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
15 years 3 months ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....
IPPS
1998
IEEE
15 years 2 months ago
Pin-Down Cache: A Virtual Memory Management Technique for Zero-Copy Communication
The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user'...
Hiroshi Tezuka, Francis O'Carroll, Atsushi Hori, Y...
DATE
2000
IEEE
101views Hardware» more  DATE 2000»
15 years 2 months ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...