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MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
15 years 3 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
HOTI
2005
IEEE
15 years 3 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
DATE
2003
IEEE
92views Hardware» more  DATE 2003»
15 years 3 months ago
An Integrated Approach for Improving Cache Behavior
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
Gokhan Memik, Mahmut T. Kandemir, Alok N. Choudhar...
SIGIR
2000
ACM
15 years 2 months ago
Partial collection replication versus caching for information retrieval systems
Abstract The explosion of content in distributed information retrieval (IR) systems requires new mechanisms to attain timely and accurate retrieval of unstructured text. In this pa...
Zhihong Lu, Kathryn S. McKinley
CIIT
2007
195views Communications» more  CIIT 2007»
14 years 11 months ago
Using a cache scheme to detect selfish nodes in mobile ad hoc networks
This paper presents a hardware based cache scheme to detect selfish nodes in mobile ad hoc network. In this scheme, the hardware monitors the activities of the upperlayer software...
H. Lin, José G. Delgado-Frias, Sirisha Medi...