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SPIN
2000
Springer
15 years 9 months ago
The Temporal Rover and the ATG Rover
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
Doron Drusinsky
DAC
1995
ACM
15 years 9 months ago
A Transformation-Based Approach for Storage Optimization
High-level synthesis (HLS) has been successfully targeted towards the digital signal processing (DSP) domain. Both application-speci c integrated circuits (ASICs) and application-...
Wei-Kai Cheng, Youn-Long Lin
DAC
2005
ACM
15 years 8 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
ECIS
2003
15 years 7 months ago
Towards definitive benchmarking of algorithm performance
One of the primary methods employed by researchers to judge the merits of new heuristics and algorithms is to run them on accepted benchmark test cases and comparing their perform...
Andrew Lim, Wee-Chong Oon, Wenbin Zhu
CEC
2010
IEEE
15 years 6 months ago
Implementing an intuitive mutation operator for interactive evolutionary 3D design
Abstract— Locality - how well neighbouring genotypes correspond to neighbouring phenotypes - has been described as a key element in Evolutionary Computation. Grammatical Evolutio...
Jonathan Byrne, James McDermott, Edgar Galvá...