56 search results - page 9 / 12 » Programmable Ethernet Switches and Their Applications |
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ASPLOS
1998
ACM
15 years 2 months ago
1998
ACM
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...
CLUSTER
2006
IEEE
14 years 10 months ago
2006
IEEE
The Linux cluster considered in this paper, formed from shuttle box XPC nodes with 2 GHz Athlon processors connected by dual Gb Ethernet switches, is relatively easily constructed...
EH
1999
IEEE
15 years 2 months ago
1999
IEEE
-- This paper describes the operation of a field programmable gate array (FPGA), the basics of current mode logic, and examines the idea of creating a SiGe heterojunction bipolar (...
ICCD
2007
IEEE
15 years 1 months ago
2007
IEEE
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
CASES
2004
ACM
15 years 1 months ago
2004
ACM
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...