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FPL
2004
Springer
110views Hardware» more  FPL 2004»
15 years 3 months ago
Versatile Imaging Architecture Based on a System on Chip
Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a F...
Pierre Chalimbaud, François Berry
ARCS
2012
Springer
13 years 5 months ago
Improving Cache Locality for Ray Casting with CUDA
Abstract: In this paper, we present an acceleration method for texture-based ray casting on the compute unified device architecture (CUDA) compatible graphics processing unit (GPU...
Yuki Sugimoto, Fumihiko Ino, Kenichi Hagihara
72
Voted
CHES
2007
Springer
126views Cryptology» more  CHES 2007»
15 years 3 months ago
How to Maximize the Potential of FPGA Resources for Modular Exponentiation
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
Daisuke Suzuki
CAP
2010
14 years 4 months ago
Parallel arithmetic encryption for high-bandwidth communications on multicore/GPGPU platforms
In this work we study the feasibility of high-bandwidth, secure communications on generic machines equipped with the latest CPUs and General-Purpose Graphical Processing Units (GP...
Ludovic Jacquin, Vincent Roca, Jean-Louis Roch, Mo...
78
Voted
VR
2007
IEEE
191views Virtual Reality» more  VR 2007»
15 years 3 months ago
A GPU Sub-pixel Algorithm for Autostereoscopic Virtual Reality
Autostereoscopic displays enable unencumbered immersive virtual reality, but at a significant computational expense. This expense impacts the feasibility of autostereo displays in...
Robert Kooima, Tom Peterka, Javier Girado, Jinghua...