Sciweavers

285 search results - page 43 / 57
» Programmable and Scalable Architecture for Graphics Processi...
Sort
View
85
Voted
IPPS
2010
IEEE
14 years 7 months ago
Acceleration of spiking neural networks in emerging multi-core and GPU architectures
Recently, there has been strong interest in large-scale simulations of biological spiking neural networks (SNN) to model the human brain mechanisms and capture its inference capabi...
Mohammad A. Bhuiyan, Vivek K. Pallipuram, Melissa ...
MICRO
2009
IEEE
147views Hardware» more  MICRO 2009»
15 years 4 months ago
Complexity effective memory access scheduling for many-core accelerator architectures
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
George L. Yuan, Ali Bakhoda, Tor M. Aamodt
SAC
2006
ACM
15 years 3 months ago
Implementing an embedded GPU language by combining translation and generation
Dynamic languages typically allow programs to be written y high level of abstraction. But their dynamic nature makes it very hard to compile such languages, meaning that a price h...
Calle Lejdfors, Lennart Ohlsson
ICPP
2009
IEEE
15 years 4 months ago
Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function
We are currently faced with the situation where applications have increasing computational demands and there is a wide selection of parallel processor systems. In this paper we fo...
Frederico Pratas, Pedro Trancoso, Alexandros Stama...
ECLIPSE
2007
ACM
15 years 1 months ago
Declarative and visual debugging in Eclipse
We present a declarative and visual debugging environment for Eclipse called JIVE.1 Traditional debugging is procedural in that a programmer must proceed step-by-step and objectby...
Jeffrey K. Czyz, Bharat Jayaraman