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ICS
2010
Tsinghua U.
15 years 2 months ago
Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization
We explore the intersection between an emerging class of architectures and a prominent workload: GPGPUs (General-Purpose Graphics Processing Units) and regular expression matching...
Jamin Naghmouchi, Daniele Paolo Scarpazza, Mladen ...
96
Voted
ICPP
2008
IEEE
15 years 4 months ago
VELO: A Novel Communication Engine for Ultra-Low Latency Message Transfers
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
Heiner Litz, Holger Fröning, Mondrian Nü...
JUCS
2007
114views more  JUCS 2007»
14 years 9 months ago
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
Susana Ortega-Cisneros, Juan Jóse Raygoza-P...
IPPS
2010
IEEE
14 years 7 months ago
A GPU-inspired soft processor for high-throughput acceleration
There is building interest in using FPGAs as accelerators for high-performance computing, but existing systems for programming them are so far inadequate. In this paper we propose...
Jeffrey Kingyens, J. Gregory Steffan
EGOV
2004
Springer
15 years 3 months ago
M-GIS - Mobile and Interoperable Access to Geographic Information
This paper describes an architecture which can be used to access geographic information from mobile devices with limited display and processing characteristics, such as Personal Di...
Jorge Cardoso, Artur Rocha, João Correia Lo...