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PPOPP
2003
ACM
15 years 2 months ago
Exploiting high-level coherence information to optimize distributed shared state
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...
DeQing Chen, Chunqiang Tang, Brandon Sanders, Sand...
71
Voted
ICPP
2002
IEEE
15 years 2 months ago
The Tracefile Testbed - A Community Repository for Identifying and Retrieving HPC Performance Data
HPC programmers utilize tracefiles, which record program behavior in great detail, as the basis for many performance analysis activities. The lack of generally accessible tracefil...
Ken Ferschweiler, Scott Harrah, Dylan Keon, Mariac...
EUROSYS
2010
ACM
15 years 1 months ago
Locating cache performance bottlenecks using data profiling
Effective use of CPU data caches is critical to good performance, but poor cache use patterns are often hard to spot using existing execution profiling tools. Typical profilers at...
Aleksey Pesterev, Nickolai Zeldovich, Robert T. Mo...
CF
2007
ACM
15 years 1 months ago
Identifying potential parallelism via loop-centric profiling
The transition to multithreaded, multi-core designs places a greater responsibility on programmers and software for improving performance; thread-level parallelism (TLP) will be i...
Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ra...
112
Voted
FPL
2006
Springer
242views Hardware» more  FPL 2006»
15 years 1 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow