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ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
15 years 5 months ago
A wideband hierarchical circuit reduction for massively coupled interconnects
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan
110
Voted
HIPEAC
2010
Springer
15 years 5 months ago
Offload - Automating Code Migration to Heterogeneous Multicore Systems
We present Offload, a programming model for offloading parts of a C++ application to run on accelerator cores in a heterogeneous multicore system. Code to be offloaded is enclosed ...
Pete Cooper, Uwe Dolinsky, Alastair F. Donaldson, ...
162
Voted
CRITICAL
2005
15 years 5 months ago
Comparing two approaches to context: realism and constructivism
During the last few years, there have been debates over what is context and how computers should act upon it. Two disparate camps of thought can be recognized. First, Realism, hav...
Antti Oulasvirta, Sakari Tamminen, Kristina Hö...
138
Voted
DAC
2005
ACM
15 years 5 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
EMSOFT
2006
Springer
15 years 5 months ago
Reusable models for timing and liveness analysis of middleware for distributed real-time and embedded systems
Distributed real-time and embedded (DRE) systems have stringent constraints on timeliness and other properties whose assurance is crucial to correct system behavior. Formal tools ...
Venkita Subramonian, Christopher D. Gill, Cé...
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