974 search results - page 182 / 195 » Programming Configurable Multiprocessors |
107
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PPL
2008
14 years 9 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
78
Voted
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
70
Voted
MICRO
2010
IEEE
14 years 7 months ago
2010
IEEE
Current trends signal an imminent crisis in the simulation of future CMPs (Chip MultiProcessors). Future micro-architectures will offer more and more thread contexts to execute pa...
128
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CAL
2010
14 years 6 months ago
2010
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
186
Voted
POPL
2009
ACM
15 years 10 months ago
2009
ACM
Transactional memory (TM) is a promising paradigm for concurrent programming. Whereas the number of TM implementations is growing, however, little research has been conducted to p...