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EUROPAR
2006
Springer
15 years 1 months ago
Tying Memory Management to Parallel Programming Models
Stand-alone threading libraries lack sophisticated memory management techniques. In this paper, we present a methodology that allows threading libraries that implement non-preempti...
Ioannis E. Venetis, Theodore S. Papatheodorou
APCSAC
2005
IEEE
15 years 3 months ago
The Challenges of Massive On-Chip Concurrency
Moore’s law describes the growth in on-chip transistor density, which doubles every 18 to 24 months and looks set to continue for at least a decade and possibly longer. This grow...
Kostas Bousias, Chris R. Jesshope
ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
15 years 2 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 1 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
SC
1995
ACM
15 years 1 months ago
Index Array Flattening Through Program Transformation
This paper presents techniques for compiling loops with complex, indirect array accesses into loops whose array references have at most one level of indirection. The transformatio...
Raja Das, Paul Havlak, Joel H. Saltz, Ken Kennedy