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120
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ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
15 years 5 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
131
Voted
VL
2002
IEEE
144views Visual Languages» more  VL 2002»
15 years 5 months ago
Interactive Visualization of Java Programs
The design and implementation of a novel visual interactive execution environment for Java is described. This system displays both the run-time object structure as well as the int...
Paul V. Gestwicki, Bharat Jayaraman
101
Voted
CATS
2007
15 years 2 months ago
Planning with Time Limits in BDI Agent Programming Languages
This paper provides a theoretical basis for performing time limited planning within Belief-Desire-Intention (BDI) agents. The BDI agent architecture is recognised as one of the mo...
Lavindra de Silva, Anthony Dekker, James Harland
89
Voted
DEXAW
2008
IEEE
93views Database» more  DEXAW 2008»
15 years 7 months ago
Overlay GHC: An Extension of Guarded Horn Clauses for Overlay Programming
Today’s high-speed network allows sophisticated applications of overlay networks. Meanwhile, usage of multicore processors has been spreading. The level of concurrency we need t...
Kenji Saito
135
Voted
MEMOCODE
2003
IEEE
15 years 6 months ago
Executable Computational Logics: Combining Formal Methods and Programming Language Based System Design
An executable computational logic can provide the desired bridge between formal system properties and formal methods to verify them on the one hand, and executable models of syste...
José Meseguer