124 search results - page 22 / 25 » Programming Language Design and Analysis Motivated by Hardwa... |
SCAM
2008
IEEE
15 years 4 months ago
2008
IEEE
—More and more current software systems rely on non trivial coordination logic for combining autonomous services typically running on different platforms and often owned by diffe...
102
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ASPLOS
2010
ACM
15 years 26 days ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
87
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AHS
2007
IEEE
15 years 1 months ago
2007
IEEE
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
PLDI
1994
ACM
15 years 1 months ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
CAV
2005
Springer
15 years 3 months ago
2005
Springer
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...