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119
Voted
EUROPAR
2009
Springer
15 years 10 months ago
2009
Springer
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
131
Voted
IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
Percolation has recently been proposed as a key component of an advanced program execution model for future generation high-end machines featuring adaptive data/code transformatio...
139
Voted
ISORC
2000
IEEE
15 years 8 months ago
2000
IEEE
We introduce Hybrid Sequence Charts (HySCs) as a visual description technique for communication in hybrid system models. To that end, we adapt a subset of the well-known MSC synta...
139
Voted
CP
2006
Springer
15 years 7 months ago
2006
Springer
This paper describes a complete and efficient solution to the stochastic allocation and scheduling for Multi-Processor System-on-Chip (MPSoC). Given a conditional task graph charac...
133
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EUROPAR
2006
Springer
15 years 7 months ago
2006
Springer
Abstract. Automatic performance analysis of parallel programs can be accomplished by scanning event traces of program execution for patterns representing inefficient behavior. The ...