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ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
15 years 6 months ago
Test-access mechanism optimization for core-based three-dimensional SOCs
— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...
Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yua...
ICCD
2006
IEEE
157views Hardware» more  ICCD 2006»
15 years 6 months ago
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A...
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
15 years 6 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu
ICCAD
2004
IEEE
87views Hardware» more  ICCAD 2004»
15 years 6 months ago
Exploiting level sensitive latches in wire pipelining
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
V. Seth, Min Zhao, Jiang Hu
ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
15 years 6 months ago
Fast 3-D Inductance Extraction in Lossy Multi-Layer Substrate
A mixed potential integral equation (MPIE) technique combined with fast multi-layer Green’s functions and Gaussian Jacobi high order techniques is used to compute the 3-D freque...
Minqing Liu, Tiejun Yu, Wayne Wei-Ming Dai