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102
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ICCD
2008
IEEE
221views Hardware» more  ICCD 2008»
15 years 6 months ago
Reversi: Post-silicon validation system for modern microprocessors
— Verification remains an integral and crucial phase of today’s microprocessor design and manufacturing process. Unfortunately, with soaring design complexities and decreasing...
Ilya Wagner, Valeria Bertacco
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 6 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ICCAD
2002
IEEE
161views Hardware» more  ICCAD 2002»
15 years 6 months ago
Non-tree routing for reliability and yield improvement
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduc...
Andrew B. Kahng, Bao Liu, Ion I. Mandoiu
WWW
2010
ACM
15 years 4 months ago
Atomate it! end-user context-sensitive automation using heterogeneous information sources on the web
The transition of personal information management (PIM) tools off the desktop to the Web presents an opportunity to augment these tools with capabilities provided by the wealth o...
Max Van Kleek, Brennan Moore, David R. Karger, Pau...
80
Voted
CGO
2010
IEEE
15 years 4 months ago
Linear scan register allocation on SSA form
The linear scan algorithm for register allocation provides a good register assignment with a low compilation overhead and is thus frequently used for just-in-time compilers. Altho...
Christian Wimmer, Michael Franz