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ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
15 years 1 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik
CASCON
2000
119views Education» more  CASCON 2000»
14 years 11 months ago
Efficient mapping of software system traces to architectural views
Information about a software system's execution can help a developer with many tasks, including software testing, performance tuning, and program understanding. In almost all...
Robert J. Walker, Gail C. Murphy, Jeffrey Steinbok...
DATE
2010
IEEE
155views Hardware» more  DATE 2010»
15 years 2 months ago
Bitstream processing for embedded systems using C++ metaprogramming
—This paper suggests a new approach for bitstream processing of embedded systems, using a combination of C++ metaprogramming combined with architecture extensions of an customiza...
Reimund Klemm, Gerhard Fettweis
ICCAD
2006
IEEE
96views Hardware» more  ICCAD 2006»
15 years 6 months ago
Loop pipelining for high-throughput stream computation using self-timed rings
We present a technique for increasing the throughput of stream processing architectures by removing the bottlenecks caused by loop structures. We implement loops as self-timed pip...
Gennette Gill, John Hansen, Montek Singh
CC
2009
Springer
153views System Software» more  CC 2009»
14 years 7 months ago
From Specification to Optimisation: An Architecture for Optimisation of Java Bytecode
We present the architecture of the Rosser toolkit that allows optimisations to be specified in a domain specific language, then compiled and deployed towards optimising object prog...
Richard Warburton, Sara Kalvala