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ASPLOS
2009
ACM
15 years 10 months ago
Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principle
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
Robert D. Cameron, Dan Lin
ISLPED
2010
ACM
231views Hardware» more  ISLPED 2010»
14 years 9 months ago
3D-nonFAR: three-dimensional non-volatile FPGA architecture using phase change memory
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero bo...
Yibo Chen, Jishen Zhao, Yuan Xie
ARCS
2009
Springer
15 years 4 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
SCM
1998
14 years 11 months ago
Coordinated Editing of Versioned Packages in the JP Programming Environment
As part of an investigation of scalable development techniques for systems written in the JavaTM programming language, the Forest Project is building JP, a prototype distributed pr...
Michael L. Van de Vanter
70
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AUSAI
2005
Springer
15 years 3 months ago
Model Checking for PRS-Like Agents
The key problem in applying verification techniques such as model checking to agent architectures is to show how to map systematically from an agent program to a model structure t...
Wayne Wobcke, Marc Chee, Krystian Ji