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WCRE
2002
IEEE
15 years 7 months ago
Exposing Data-Level Parallelism in Sequential Image Processing Algorithms
As new computer architectures are developed to exploit large-scale data-level parallelism, techniques are needed to retarget legacy sequential code to these platforms. Sequential ...
Lewis B. Baumstark Jr., Linda M. Wills
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
15 years 7 months ago
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study
Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on su...
Matthias Gries, Chidamber Kulkarni, Christian Saue...
140
Voted
HIPC
2009
Springer
15 years 8 days ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
118
Voted
PLDI
2003
ACM
15 years 7 months ago
Taming the IXP network processor
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
Lal George, Matthias Blume
EUROGP
2005
Springer
115views Optimization» more  EUROGP 2005»
15 years 8 months ago
Genetic Programming in Wireless Sensor Networks
Abstract. Wireless sensor networks (WSNs) are medium scale manifestations of a paintable or amorphous computing paradigm. WSNs are becoming increasingly important as they attain gr...
Derek M. Johnson, Ankur Teredesai, Robert T. Salta...