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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 6 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
DAC
2003
ACM
16 years 3 months ago
Partial task assignment of task graphs under heterogeneous resource constraints
This paper presents a novel partial assignment technique (PAT) that decides which tasks should be assigned to the same resource without explicitly defining assignment of these tas...
Radoslaw Szymanek, Krzysztof Kuchcinski
ICIW
2008
IEEE
15 years 9 months ago
Evaluating the Use of AOP and MDA in Web Service Development
— Model-Driven Architecture (MDA) is introduced to shorten the software development time, produce better quality of code and promote the reuse of software artifacts. On the other...
Guadalupe Ortiz, Behzad Bordbar, Juan Herná...
132
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SIGMOD
2011
ACM
210views Database» more  SIGMOD 2011»
14 years 5 months ago
A platform for scalable one-pass analytics using MapReduce
Today’s one-pass analytics applications tend to be data-intensive in nature and require the ability to process high volumes of data efficiently. MapReduce is a popular programm...
Boduo Li, Edward Mazur, Yanlei Diao, Andrew McGreg...
DSN
2005
IEEE
15 years 8 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh