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ISCAS
2011
IEEE
261views Hardware» more  ISCAS 2011»
14 years 6 months ago
Hardware synchronization for embedded multi-core processors
Abstract— Multi-core processors are about to conquer embedded systems — it is not the question of whether they are coming but how the architectures of the microcontrollers shou...
Christian Stoif, Martin Schoeberl, Benito Liccardi...
ICPP
1998
IEEE
15 years 7 months ago
A memory-layout oriented run-time technique for locality optimization
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
Yong Yan, Xiaodong Zhang, Zhao Zhang
HPCA
2006
IEEE
16 years 3 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
IPPS
1999
IEEE
15 years 7 months ago
An Adaptive, Fault-Tolerant Implementation of BSP for JAVA-Based Volunteer Computing Systems
Abstract. In recent years, there has been a surge of interest in Javabased volunteer computing systems, which aim to make it possible to build very large parallel computing network...
Luis F. G. Sarmenta
EUROPAR
2007
Springer
15 years 9 months ago
Search Strategies for Automatic Performance Analysis Tools
Periscope is a distributed automatic online performance analysis system for large scale parallel systems. It consists of a set of analysis agents distributed on the parallel machin...
Michael Gerndt, Edmond Kereku