1557 search results - page 183 / 312 » Programming up to Congruence |
HPCA
2008
IEEE
15 years 11 months ago
2008
IEEE
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
ASPLOS
2010
ACM
15 years 6 months ago
2010
ACM
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
IPPS
2005
IEEE
15 years 4 months ago
2005
IEEE
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
ISLPED
2005
ACM
15 years 4 months ago
2005
ACM
ABSTRACT Motivated by data value locality and quality tolerance present in multimedia applications, we propose a new micro-architecture, Region-level Approximate Computation Buffer...