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VLSID
2004
IEEE
125views VLSI» more  VLSID 2004»
15 years 11 months ago
Energy-Optimizing Source Code Transformations for OS-driven Embedded Software
The increasing software content of battery-powered embedded systems has fueled much interest in techniques for developing energyefficient embedded software. Source code transforma...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
ASPLOS
2010
ACM
15 years 6 months ago
Flexible architectural support for fine-grain scheduling
To make efficient use of CMPs with tens to hundreds of cores, it is often necessary to exploit fine-grain parallelism. However, managing tasks of a few thousand instructions is ...
Daniel Sanchez, Richard M. Yoo, Christos Kozyrakis
ISPD
2009
ACM
141views Hardware» more  ISPD 2009»
15 years 6 months ago
A faster approximation scheme for timing driven minimum cost layer assignment
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
Shiyan Hu, Zhuo Li, Charles J. Alpert
SAC
2009
ACM
15 years 6 months ago
GTfold: a scalable multicore code for RNA secondary structure prediction
The prediction of the correct secondary structures of large RNAs is one of the unsolved challenges of computational molecular biology. Among the major obstacles is the fact that a...
Amrita Mathuriya, David A. Bader, Christine E. Hei...
LCTRTS
2009
Springer
15 years 6 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava