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IEEEPACT
2002
IEEE
15 years 10 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
146
Voted
ISCAS
2002
IEEE
154views Hardware» more  ISCAS 2002»
15 years 10 months ago
Architectural approaches to reduce leakage energy in caches
In this paper, we present two methods to reduce leakage energy by dynamically resizing the cache during program execution. The first method monitors the miss rate of the individua...
S. H. Tadas, C. Chakrabarti
SCAM
2002
IEEE
15 years 10 months ago
Handling Preprocessor-Conditioned Declarations
Many software systems are developed with configurable functionality, and for multiple hardware platforms and operating systems. This can lead to thousands of possible configuratio...
Lerina Aversano, Massimiliano Di Penta, Ira D. Bax...
125
Voted
ICSE
2010
IEEE-ACM
15 years 10 months ago
A degree-of-knowledge model to capture source code familiarity
The size and high rate of change of source code comprising a software system make it difficult for software developers to keep up with who on the team knows about particular parts...
Thomas Fritz, Jingwen Ou, Gail C. Murphy, Emerson ...
181
Voted
DAC
2009
ACM
15 years 9 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers