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IEAAIE
1999
Springer
15 years 5 months ago
New Directions in Debugging Hardware Designs
This paper introduces a new approach in the debugging of hardware designs. The design is given as a VHDL program and converted in a component connection model. The conversion is si...
Franz Wotawa
FMOODS
2008
15 years 2 months ago
VeriCool: An Automatic Verifier for a Concurrent Object-Oriented Language
Reasoning about object-oriented programs is hard, due to , dynamic binding and the need for data abstraction and framing. Reasoning about concurrent object-oriented programs is eve...
Jan Smans, Bart Jacobs 0002, Frank Piessens
DATE
2007
IEEE
98views Hardware» more  DATE 2007»
15 years 7 months ago
Simulation-based reusable posynomial models for MOS transistor parameters
We present an algorithm to automatically design posynomial models for parameters of the MOS transistors using simulation data. These models improve the accuracy of the Geometric P...
Varun Aggarwal, Una-May O'Reilly
ECOOP
2000
Springer
15 years 5 months ago
A Basic Model of Typed Components
This paper studies specific language level abstractions for component-based programming. We propose a simple model which captures some basic ingredients — like explicit context ...
João Costa Seco, Luís Caires
ECOOPW
1999
Springer
15 years 5 months ago
Aspects and Superimpositions
The model checking of applications of aspects is explained, by showing the stages and proof obligations when a collection of generic aspects (called a superimposition) is combined...
Shmuel Katz, Joseph Gil