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115
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MICRO
2006
IEEE
15 years 7 months ago
2006
IEEE
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
118
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EUROPAR
2004
Springer
15 years 6 months ago
2004
Springer
The BlueGene/L supercomputer will consist of 65,536 dual-processor compute nodes interconnected by two high-speed networks: a three-dimensional torus network and a tree topology ne...
116
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FCCM
2003
IEEE
15 years 6 months ago
2003
IEEE
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
104
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ISCA
2010
IEEE
15 years 6 months ago
2010
IEEE
Light-weight, flexible access control, which allows software to regulate reads and writes to any granularity of memory region, can help improve the reliability of today’s multi...
123
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ICPP
2002
IEEE
15 years 6 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...