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CGO
2008
IEEE
15 years 11 months ago
Latency-tolerant software pipelining in a production compiler
In this paper we investigate the benefit of scheduling non-critical loads for a higher latency during software pipelining. "Noncritical" denotes those loads that have s...
Sebastian Winkel, Rakesh Krishnaiyer, Robyn Sampso...
CGO
2008
IEEE
15 years 11 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
CODES
2008
IEEE
15 years 11 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
INFOCOM
2008
IEEE
15 years 11 months ago
Firewall Compressor: An Algorithm for Minimizing Firewall Policies
—A firewall is a security guard placed between a private network and the outside Internet that monitors all incoming and outgoing packets. The function of a firewall is to exam...
Alex X. Liu, Eric Torng, Chad R. Meiners
NDSS
2008
IEEE
15 years 11 months ago
Automatic Network Protocol Analysis
Protocol reverse engineering is the process of extracting application-level specifications for network protocols. Such specifications are very helpful in a number of security-re...
Gilbert Wondracek, Paolo Milani Comparetti, Christ...