We study (collapsible) higher-order pushdown systems -- theoretically robust and well-studied models of higher-order programs -- along with their natural subclass called (collapsi...
Rising Field Programmable Gate Array (FPGA) market volumes combined with increasing industrial popularity have driven prices down and improved capability to the point that FPGA ha...
This paper presents the automatic extension of TERSEO to other languages, a knowledge-based system for the recognition and normalization of temporal expressions, originally develo...
Abstract—The Charm++ parallel programming system provides a modular performance interface that can be used to extend its performance measurement and analysis capabilities. The in...
Scott Biersdorff, Chee Wai Lee, Allen D. Malony, L...
We present a novel application on model checking through SPIN as a means for verifying purely descriptive specifications written in TRIO, a first order, linear-time temporal logic ...
Angelo Morzenti, Matteo Pradella, Pierluigi San Pi...