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ERSA
2006
186views Hardware» more  ERSA 2006»
15 years 6 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
ICLP
2009
Springer
16 years 5 months ago
Logic Programs under Three-Valued Lukasiewicz Semantics
If logic programs are interpreted over a three-valued logic, then often Kleene's strong three-valued logic with complete equivalence and Fitting's associated immediate co...
Carroline Dewi Puspa Kencana Ramli, Steffen Hö...
VMCAI
2010
Springer
16 years 2 months ago
Temporal Reasoning for Procedural Programs
While temporal verification of programs is a topic with a long history, its traditional basis--semantics based on word languages--is illsuited for modular reasoning about procedura...
Rajeev Alur, Swarat Chaudhuri
SCP
2008
150views more  SCP 2008»
15 years 4 months ago
Google's MapReduce programming model - Revisited
Google's MapReduce programming model serves for processing large data sets in a massively parallel manner. We deliver the first rigorous description of the model including it...
Ralf Lämmel
ICVS
2001
Springer
15 years 9 months ago
Compiling SA-C Programs to FPGAs: Performance Results
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...
Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hamm...