Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
At MITRE we are developing tools to aid analysts in assessing the operational usability and quality of object-oriented code. Our tools statically examine source code, automaticall...
Angel Asencio, Sam Cardman, David Harris, Ellen La...
Since the publication of the Design Patterns book, a large number of design patterns have been identified and codified. Unfortunately, these patterns are mostly organised in an ad...
—As the application and complexity of microelectromechanical (MEMS) devices increases, there is a corresponding need for automated design and optimization tools to augment engine...
Jason D. Lohn, William F. Kraus, Gregory S. Hornby
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...