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» Proof Nets and the Identity of Proofs
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CHARME
2005
Springer
136views Hardware» more  CHARME 2005»
15 years 3 months ago
Acceleration of SAT-Based Iterative Property Checking
Today, verification is becoming the dominating factor for successful circuit designs. In this context formal verification techniques allow to prove the correctness of a circuit ...
Daniel Große, Rolf Drechsler
STOC
1993
ACM
141views Algorithms» more  STOC 1993»
15 years 2 months ago
Bounds for the computational power and learning complexity of analog neural nets
Abstract. It is shown that high-order feedforward neural nets of constant depth with piecewisepolynomial activation functions and arbitrary real weights can be simulated for Boolea...
Wolfgang Maass
CORR
2006
Springer
108views Education» more  CORR 2006»
14 years 10 months ago
Two polygraphic presentations of Petri nets
: This document gives an algebraic and two polygraphic translations of Petri nets, all three providing an easier way to describe reductions and to identify some of them. The first ...
Yves Guiraud
APLAS
2010
ACM
14 years 10 months ago
Reasoning about Computations Using Two-Levels of Logic
We describe an approach to using one logic to reason about specifications written in a second logic. One level of logic, called the "reasoning logic", is used to state th...
Dale Miller
ACSD
2005
IEEE
90views Hardware» more  ACSD 2005»
15 years 3 months ago
Improved Decomposition of STGs
Signal Transition Graphs (STGs) are a version of Petri nets for the specification of asynchronous circuit behaviour. It has been suggested to decompose such a specification as a...
Walter Vogler, Ben Kangsah