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ICSM
2007
IEEE
15 years 7 months ago
Fault Detection Probability Analysis for Coverage-Based Test Suite Reduction
Test suite reduction seeks to reduce the number of test cases in a test suite while retaining a high percentage of the original suite’s fault detection effectiveness. Most appro...
Scott McMaster, Atif M. Memon
102
Voted
ATS
2001
IEEE
126views Hardware» more  ATS 2001»
15 years 4 months ago
Design of an Optimal Test Access Architecture Using a Genetic Algorithm
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
Zahra Sadat Ebadi, André Ivanov
85
Voted
ATS
2009
IEEE
99views Hardware» more  ATS 2009»
15 years 7 months ago
Test Generation for Designs with On-Chip Clock Generators
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
Xijiang Lin, Mark Kassab
89
Voted
ICST
2008
IEEE
15 years 7 months ago
Model-Based Tests for Access Control Policies
We present a model-based approach to testing access control requirements. By using combinatorial testing, we first automatically generate test cases from and without access contro...
Alexander Pretschner, Tejeddine Mouelhi, Yves Le T...
109
Voted
GI
2007
Springer
15 years 6 months ago
Automated Test Case Selection Based on a Similarity Function
: A strategy for automatic test case selection based on the use of a similarity function is presented. Test case selection is a crucial activity to model-based testing since the nu...
Emanuela G. Cartaxo, Francisco G. Oliveira Neto, P...