689 search results - page 10 / 138 » Proposal of High Level Architecture Extension |
ICCD
2005
IEEE
15 years 5 months ago
2005
IEEE
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
TVLSI
2008
14 years 11 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
103
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DATE
2004
IEEE
15 years 3 months ago
2004
IEEE
In this paper we analyse some methodological concerns that have to be faced in a design flow which contains automatic synthesis phases from high-level, system descriptions. In par...
DAC
2002
ACM
16 years 24 days ago
2002
ACM
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
119
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DASIP
2010
14 years 6 months ago
2010
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...