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» Proposal of High Level Architecture Extension
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HPCA
2005
IEEE
15 years 3 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
CODASPY
2012
13 years 5 months ago
Identifying native applications with high assurance
Main stream operating system kernels lack a strong and reliable mechanism for identifying the running processes and binding them to the corresponding executable applications. In t...
Hussain M. J. Almohri, Danfeng (Daphne) Yao, Denni...
OTM
2007
Springer
15 years 3 months ago
Trust Management Model and Architecture for Context-Aware Service Platforms
The entities participating in a context-aware service platform need to establish and manage trust relationships in order to assert different trust aspects including identity provis...
Ricardo Neisse, Maarten Wegdam, Marten van Sindere...
TECS
2008
122views more  TECS 2008»
14 years 9 months ago
Quantitative analysis of the speed/accuracy trade-off in transaction level modeling
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
Gunar Schirner, Rainer Dömer
ICC
2007
IEEE
246views Communications» more  ICC 2007»
15 years 4 months ago
AR-TP: An Adaptive and Responsive Transport Protocol for Wireless Mesh Networks
Abstract—Wireless meshing has been envisioned as the economically viable networking paradigm to build up broadband and large-scale wireless commodity networks. Several different ...
Vehbi Cagri Gungor, Pasquale Pace, Enrico Natalizi...