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» Proposal of High Level Architecture Extension
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VLSID
2005
IEEE
167views VLSI» more  VLSID 2005»
15 years 10 months ago
A Methodology and Tooling Enabling Application Specific Processor Design
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
Andreas Hoffmann, Frank Fiedler, Achim Nohl, Suren...
CLUSTER
2005
IEEE
15 years 3 months ago
Load Balancing using Grid-based Peer-to-Peer Parallel I/O
In the area of Grid computing, there is a growing need to process large amounts of data. To support this trend, we need to develop efficient parallel storage systems that can prov...
Yijian Wang, David R. Kaeli
FLAIRS
2004
14 years 11 months ago
PIModel: A Pragmatic ITS Model Based on Instructional Automata Theory
It is a vital and challenging issue in AI community to get the "Right Information" to the "Right People" in the "Right Language" in the "Right T...
Jinxin Si, Xiaoli Yue, Cungen Cao, Yuefei Sui
CONEXT
2009
ACM
14 years 11 months ago
BUFFALO: bloom filter forwarding architecture for large organizations
In enterprise and data center networks, the scalability of the data plane becomes increasingly challenging as forwarding tables and link speeds grow. Simply building switches with...
Minlan Yu, Alex Fabrikant, Jennifer Rexford
MICRO
2007
IEEE
159views Hardware» more  MICRO 2007»
15 years 4 months ago
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...
Kypros Constantinides, Onur Mutlu, Todd M. Austin,...