689 search results - page 5 / 138 » Proposal of High Level Architecture Extension |
SOSP
1993
ACM
14 years 11 months ago
1993
ACM
Research can rarely be performed on large-scale, distributed systems at the level of thousands of workstations. In this paper, we describe the motivating constraints, design princ...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
ICCD
2007
IEEE
15 years 6 months ago
2007
IEEE
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
ERSA
2006
14 years 11 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...