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DAC
1998
ACM
15 years 4 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
ICC
2007
IEEE
102views Communications» more  ICC 2007»
15 years 6 months ago
M-gated Scheduling in Wireless Networks: Performance and Cross-layer Design
—E-limited (or K-limited) scheduling is attractive because its performance is close to that of the exhaustive scheduling which is proven to be the optimal polling scheme for symm...
Yan Li, Guangxi Zhu
ICDE
2010
IEEE
203views Database» more  ICDE 2010»
15 years 4 months ago
Optimizing ETL workflows for fault-tolerance
Extract-Transform-Load (ETL) processes play an important role in data warehousing. Typically, design work on ETL has focused on performance as the sole metric to make sure that the...
Alkis Simitsis, Kevin Wilkinson, Umeshwar Dayal, M...
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
14 years 3 months ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...
ICML
2000
IEEE
16 years 15 days ago
Rates of Convergence for Variable Resolution Schemes in Optimal Control
This paper presents a general method to derive tight rates of convergence for numerical approximations in optimal control when we consider variable resolution grids. We study the ...
Andrew W. Moore, Rémi Munos