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» Protocol Implementation Using Integrated Layer Processing
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SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
15 years 7 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
ICDCS
2005
IEEE
15 years 7 months ago
Supporting Live Development of SOAP and CORBA Servers
We present middleware for a Server Development Environment that facilitates live development of SOAP and CORBA servers. As the underlying implementation platform, we use JPie, a t...
Sajeeva L. Pallemulle, Kenneth J. Goldman, Brandon...
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 6 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
CODES
2000
IEEE
15 years 5 months ago
On the roles of functions and objects in system specification
We present an analysis of the benefits and drawbacks of function and object based models in system specification. Functional models should be used for functional design space expl...
Axel Jantsch, Ingo Sander
ICIP
1999
IEEE
16 years 3 months ago
Interactive Color Image Segmentation Editor Driven by Active Contour Model
A new general-purpose color image segmentation editor (CISE) for the purpose of extracting a semantic object is designed, implemented and tested on a number of various natural sce...
Jean Gao, Akio Kosaka, Avinash C. Kak