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» Protocol synthesis from timed and structured specifications
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DATE
1999
IEEE
139views Hardware» more  DATE 1999»
15 years 1 months ago
OpenJ: An Extensible System Level Design Language
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
Jianwen Zhu, Daniel Gajski
SCESM
2006
ACM
238views Algorithms» more  SCESM 2006»
15 years 3 months ago
Nobody's perfect: interactive synthesis from parametrized real-time scenarios
As technical systems keep growing more complex and sophisticated, designing software for the safety-critical coordination between their components becomes increasingly difficult....
Holger Giese, Stefan Henkler, Martin Hirsch, Flori...
ISSS
1998
IEEE
130views Hardware» more  ISSS 1998»
15 years 1 months ago
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...
Yin-Tsung Hwang, Yuan-Hung Wang
CI
2005
99views more  CI 2005»
14 years 9 months ago
Automatically Generating Tree Adjoining Grammars from Abstract Specifications
TRACT SPECIFICATIONS FEI XIA AND MARTHA PALMER Department of Computer and Information Science, University of Pennsylvania, Philadelphia, PA 19104 K. VIJAY-SHANKER Department of Com...
Fei Xia, Martha Palmer, K. Vijay-Shanker
CODES
2010
IEEE
14 years 6 months ago
Automatic memory partitioning: increasing memory parallelism via data structure partitioning
In high-level synthesis, pipelined designs are often restricted by the number of memory banks available to the synthesis system. Using multiple memory banks can improve the perfor...
Yosi Ben-Asher, Nadav Rotem