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» Protocol synthesis from timed and structured specifications
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ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
15 years 1 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
15 years 1 months ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
15 years 1 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
VLSID
2003
IEEE
123views VLSI» more  VLSID 2003»
15 years 9 months ago
Synthesis of Real-Time Embedded Software by Timed Quasi-Static Scheduling
A formal synthesis method for complex real-time embedded software is proposed in this work. Compared to previous work, our method not only synthesizes embedded software with compl...
Pao-Ann Hsiung, Feng-Shi Su
101
Voted
UAIS
2010
14 years 4 months ago
Auditory universal accessibility of data tables using naturally derived prosody specification
Abstract Text documents usually embody visually oriented meta-information in the form of complex visual structures, such as tables. The semantics involved in such objects result in...
Dimitris Spiliotopoulos, Gerasimos Xydas, Georgios...