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ICCD
1995
IEEE
51views Hardware» more  ICCD 1995»
15 years 9 months ago
Implementing a STARI chip
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
Mark R. Greenstreet
RTAS
2008
IEEE
15 years 12 months ago
Optimizing the Implementation of Communication in Synchronous Reactive Models
A fundamental asset of a model-based development process is the capability of providing an automatic implementation of the model that preserves its semantics and, at the same time...
Marco Di Natale, Guoqiang Wang, Alberto L. Sangiov...
VTC
2008
IEEE
126views Communications» more  VTC 2008»
15 years 12 months ago
On the Impact of Coarse Synchronization on the Performance of Broadcast/Multicast Single Frequency Network Operation in WCDMA
Abstract—We evaluate the system-level performance and potential capacity gain of MBSFN (Multicast/Broadcast Single Frequency Network) operation in Wideband CDMA (WCDMA) and compa...
Christoph A. Jotten, Christian Sgraja, Josef J. Bl...
WSNA
2003
ACM
15 years 11 months ago
Asymptotically optimal time synchronization in dense sensor networks
We consider the problem of synchronization of all clocks in a sensor network, in the regime of asymptotically high node densities. We formulate this problem as one in which all cl...
An-Swol Hu, Sergio D. Servetto
IPPS
1999
IEEE
15 years 10 months ago
Implementation of a Virtual Time Synchronizer for Distributed Databases
The availability of high speed networks and improved microprocessor performance have made it possible to build inexpensive cluster of workstations as an appealing platform for par...
Azzedine Boukerche, Sajal K. Das, Ajoy Kumar Datta...