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ICDCS
2000
IEEE
15 years 2 months ago
Improving Distributed Workload Performance by Sharing both CPU and Memory Resources
We develop and examine job migration policies by considering effective usage of global memory in addition to CPU load sharing in distributed systems. When a node is identified fo...
Xiaodong Zhang, Yanxia Qu, Li Xiao
SIGGRAPH
2000
ACM
15 years 2 months ago
The WarpEngine: an architecture for the post-polygonal age
We present the WarpEngine, an architecture designed for realtime image-based rendering of natural scenes from arbitrary viewpoints. The modeling primitives are real-world images w...
Voicu Popescu, John G. Eyles, Anselmo Lastra, Josh...
PDP
2010
IEEE
15 years 2 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ICS
1998
Tsinghua U.
15 years 1 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
VECPAR
1998
Springer
15 years 1 months ago
Simulating Magnetised Plasma with the Versatile Advection Code
Abstract. Matter in the universe mainly consists of plasma. The dynamics of plasmas is controlled by magnetic fields. To simulate the evolution of magnetised plasma, we solve the e...
Rony Keppens, Gábor Tóth