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DLT
2008
14 years 11 months ago
Emptiness of Multi-pushdown Automata Is 2ETIME-Complete
We consider multi-pushdown automata, a multi-stack extension of pushdown automata that comes with a constraint on stack operations: a pop can only be performed on the first non-emp...
Mohamed Faouzi Atig, Benedikt Bollig, Peter Haberm...
FSTTCS
2006
Springer
15 years 1 months ago
On Decidability of LTL Model Checking for Process Rewrite Systems
We establish a decidability boundary of the model checking problem for infinite-state systems defined by Process Rewrite Systems (PRS) or weakly extended Process Rewrite Systems (w...
Laura Bozzelli, Mojmír Kretínsk&yacu...
FSTTCS
2009
Springer
15 years 4 months ago
Covering of ordinals
The paper focuses on the structure of fundamental sequences of ordinals smaller than ε0. A first result is the construction of a monadic second-order formula identifying a given ...
Laurent Braud
DATE
2010
IEEE
138views Hardware» more  DATE 2010»
15 years 2 months ago
Checking and deriving module paths in Verilog cell library descriptions
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...
ICPR
2008
IEEE
15 years 4 months ago
A new courtesy amount recognition module of a Check Reading System
A new courtesy amount recognition module of CENPARMI’s Check Reading System (CRS) is proposed in this paper. The module consists of 3 main segments: pre-processing, segmentation...
Wu Ding, Ching Y. Suen, Adam Krzyzak