3879 search results - page 111 / 776 » PyPBS design and methodologies |
138
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HICSS
2006
IEEE
15 years 10 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
154
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CODES
2005
IEEE
15 years 10 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
135
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GLVLSI
2006
IEEE
15 years 10 months ago
2006
IEEE
Reliability has become a significant challenge for system design in new process technologies. Higher integration levels dramatically increase power densities, which leads to high...
118
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PATMOS
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. This paper presents the validation methodology established and applied during the development of a wireless LAN application. The target of the development is the implemen...
123
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DAC
1999
ACM
15 years 8 months ago
1999
ACM
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...