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ISLPED
2005
ACM
91views Hardware» more  ISLPED 2005»
15 years 10 months ago
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs
As FPGAs enter the nanometer regime, several modifications are needed to reduce the increasing leakage power dissipation. Hence, this work presents some modifications to the FPG...
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 9 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
15 years 8 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
DAC
2003
ACM
16 years 5 months ago
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools
As minimum feature sizes continue to shrink, patterned features have become significantly smaller than the wavelength of light used in optical lithography. As a result, the requir...
Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, J...
AI
2005
Springer
15 years 10 months ago
Multiagent Systems Viewed as Distributed Scheduling Systems: Methodology and Experiments
In this article, we present a design technique that facilitates the work of extracting and defining the tasks scheduling problem for a multiagent system. We also compare a central...
Sébastien Paquet, Nicolas Bernier, Brahim C...