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JILP
2002
83views more  JILP 2002»
15 years 4 months ago
Using Statistical and Symbolic Simulation for Microprocessor Performance Evaluation
As microprocessor designs continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models...
Mark Oskin, Frederic T. Chong, Matthew K. Farrens
IPPS
1998
IEEE
15 years 9 months ago
Synthesis of a Systolic Array Genetic Algorithm
The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demostrated is the design methodology, where a simple genetic algorithm exp...
Graham M. Megson, I. M. Bland
ICCAD
1997
IEEE
96views Hardware» more  ICCAD 1997»
15 years 9 months ago
Resource sharing in hierarchical synthesis
This paper presents a new approach to hierarchical high-level synthesis with respect to internal register-transfer structures of complex components. Entire subdesigns can efficie...
Oliver Bringmann, Wolfgang Rosenstiel
AMAST
2008
Springer
15 years 6 months ago
Implementing a Categorical Information System
The authors have proposed using category-theoretic sketches to enhance database design and integration methodologies. The algebraic context is called the Sketch Data Model (SkDM) a...
Michael Johnson, Robert D. Rosebrugh
DAC
2005
ACM
15 years 6 months ago
On the need for statistical timing analysis
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
Farid N. Najm