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DATE
2004
IEEE
174views Hardware» more  DATE 2004»
15 years 8 months ago
Graph-Based Functional Test Program Generation for Pipelined Processors
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
Prabhat Mishra, Nikil Dutt
126
Voted
CODES
2001
IEEE
15 years 8 months ago
Towards effective embedded processors in codesigns: customizable partitioned caches
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
Peter Petrov, Alex Orailoglu
MATA
2000
Springer
104views Communications» more  MATA 2000»
15 years 8 months ago
Modeling an OMG-MASIF Compliant Mobile Agent Platform with the RM-ODP Engineering Language
In order to model telecommunications services as mobile agent system, we are defining a methodology based on the RM-ODP standards. Our approach makes the distinction between the se...
Florin Muscutariu, Marie-Pierre Gervais
DAC
1997
ACM
15 years 8 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
156
Voted
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
15 years 8 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham